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DATE |
TITLE |
AUTHOR/ PUBLICATION |
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PRESENTATIONS
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07/08 |
Power Integrity Engineering
DC Power Integrity |
Scott McMorrow Samtec
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02/08 |
DesignCon 2008 - RealTime interview with Brian Vicich on how Samtec
makes the PCB designer’s job easier. |
Brian Vicich, Samtec |
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02/08 |
DesignCon 2008 - Pushing the Envelope without Tears: An Advanced Power Delivery
Solution |
Steve Weir, Teraspeed Consulting |
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02/08 |
DesignCon 2008 - High Bandwidth Modeling and Simulation of SSO Effects on Single-Ended
Switching Performance of Complex FPGA System Designs |
Scott McMorrow, Steve Weir, Teraspeed
Consulting and Chris Herrick, Steve Pytel, Ansoft Corporation |
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02/08 |
DesignCon 2008 - Test Fixturing and Measurement Methodology |
Emad Soubh, Samtec,Inc.
Brock LaMeres, Probing Technology
Brent Holcombe, Probing Technology |
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02/08 |
DesignCon 2008 - Mode Conversion and EMI Performance |
Jim Nadolny
Samtec, Inc. |
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12/07 |
Shielded Cable Assemblies & EMI Performance |
Jim Nadolny
Samtec, Inc. |
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04/07 |
Understanding Samtec's Electrical Circuit Simulation Models of Cable Assemblies
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Corey Kimble
Samtec |
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02/07 |
PCB Design Methods for Optimum FPGA SerDes Jitter Performance - DesignCon 2007
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Steve Weir
Teraspeed Consulting |
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02/07 |
A New Innovation: Connectorless Probing Enables High Speed Serial Protocol
Testing - DesignCon 2007 |
Barbara P. Aichinger
FuturePlus Systems Corp. |
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01/07 |
Design and Application of an Optical Backplane Connection System - DesignCon 2007
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Brian Vicich, Ken Hopkins,
Richard Pitwon |
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01/07 |
A Novel Procedure for Characterization of Multi-Port High Speed Balanced Devices
- DesignCon 2007 |
Jim Nadolny
Vahe' Adamian |
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12/06 |
Link Path Modeling for SI Analysis |
Jim Nadolny |
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06/06 |
Cable Assembly Modeling |
Jim Nadolny |
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02/06 |
IBIS Connector Models: Facts vs. Fiction - DesignCon 2006 TecPreview
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Jim Nadolny
Corey Kimble |
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11/05 |
Advanced Edge Card Transitions |
Scott McMorrow
Teraspeed Consulting |
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09/05 |
Simplified Design and Modeling of Surface Mount Connector Pad Transitions for Applications
at 10 to 20 Gbps NRZ |
Brian Vicich, Samtec,
Scott McMorrow, Teraspeed |
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08/05 |
How to Use Connector Spice Models |
Scott McMorrow |
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06/05 |
Understanding the Apparent Impedance of Interconnects |
Julian Ferry |
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03/05 |
Designing High Speed Cable Assemblies |
Scott McMorrow |
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02/05 |
RoHS Compliant |
Jan Hrouda |
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02/05 |
Final Inch® - A Plug-and-Play reference Design Solution for High Speed Interconnects |
Julian Ferry |
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12/04 |
High Speed Flex Circuit Design Considerations |
Scott McMorrow |
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08/04 |
Connector Pinout - the Art and Science of Connector Grounds |
Scott McMorrow |
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04/04 |
Designing High Speed Cable Assemblies
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Emad Soubh |
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04/04 |
Webinar -
Advances in Design, Modeling, Simulation and Measurement Validation of High Performance
Board-to-Board 5 to 10 Gbps Interconnects |
Brian Vicich, Samtec,
Scott McMorrow, Tom Dagostino, Bob Ross, Teraspeed,
Rob Hinz, Cider Designs |
QTE-DP
QSE-DP
EQCD
HFEM-DP
HFEM-SE |
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02/04 |
DesignCon -
Advances in Design, Modeling, Simulation and Measurement Validation of High Performance
Board-to-Board 5 to 10 Gbps Interconnects |
Brian Vicich, Samtec,
Scott McMorrow, Tom Dagostino, Bob Ross, Teraspeed,
Rob Hinz, Cider Designs |
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11/03 |
Samtec Connector Models for Electrical Simulation
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Corey Kimble |
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09/03 |
Optimizing Flex Circuitry
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Glenn Menear |
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07/03 |
Final Inch®
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Dave Givens |
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