Joint Test Action Group, also known as JTAG, is the common name for IEEE std 1149.1. This standard defines a particular method for testing board-level interconnects, which is also called Boundary Scan. In short, JTAG was created as a way to test for common problems, but lately has become a way of configuring devices.  The JTAG hardware interprets information from five different signals: TDI (Test Data In), TDO (Test Data Out), TMS (Test Mode Select),  TCK (Test Clock), and TRST(Test Report-optional).

The primary advantage of boundary-scan technology is the ability to observe data at the device inputs and control the data at the outputs independently of the application logic. Simple tests can find manufacturing defects such as unconnected pins, a missing device, an incorrect or rotated device on a circuit board, and even a failed or dead device.

JTAG defines several different configurations with a few of these being an 8 position connector, a 14 position connector, and a 20 position connector. The following Samtec parts are compliant with JTAG:

FHSC, HHSC, THSC, TSW, TSM, HMTSW, MTSW, MTLW, TLW, TSSH, HTSS, HTST, TST, ZSS, ZST, EJH, IDSD, IDSS

Info on this page was taken from the websites below:

http://www.embedded.com/story/OEG20021028S0049