| The Final Inch®
is not complete without validation of the electrical system performance
through signal integrity modeling, simulations, and measurements.
Advanced 2D and 3D
modeling methods are used to provide accurate models for all sections
of the Final Inch® boards. Test boards have been manufactured and
characterized through measurements and then correlated to simulations.
These measurements
are then compared to original simulation results for correlation and modeling
process improvement. Some VNA measurements are converted to HSPICE models
utilizing Sigrity BroadBand Spice, simulated in the frequency and time
domain, and compared to the original simulation models. These comparisons
are fed back into the modeling process to correct for PCB trace loss characteristics
and provide process improvements.
Samtec is now offering
"on request" test data including eye patterns for our Final
Inch® circuits using our new Agilent PLTS 50 GHz Characterization
System. For more information on this new service, click here.
Click here to view
Samtec's Comparison of
Eye Patterns Generated by Synopsis HSPICE and the Agilent PLTS white
paper. This document shows that there is good correlation between Samtec's
Final Inch® HSPICE simulated eye patterns to eye patterns processed
from S-parameter data measured with Samtec's new Agilent PLTS 50 GHz High
Speed Characterization System. Samtec QPairs® QTE-DP/QSE-DP Final
Inch® simulations were used as the test article.
Click on the link
below to view the Empirical Signal Integrity Data that you require:
Center Route,
Differential with Grounds
Channel
Properties
Click here to view
our PCIE Series Application
Note in PCI Express Applications. |