Emerging markets like AL/ML, Data Center, and HPC require high bandwidth and low latency interconnect. The new PCIe® 6.0 specification doubles the throughput from PCIe® 5.0 to 64 GT/s per channel leveraging PAM4 encoding, FLIT-based encoding, and low-latency FEC to improve bandwidth efficiency. In this video, Matthew Burns, Technical Marketing Manager at Samtec, walks us through a demonstration of a prototypical PCIe 6.0 AI hardware design based on PECFF infrastructure. Working with Synopsys PCIe 6.0 IP, we see a motherboard combined with AICs with top card connectivity via Samtec’s new 0.60 mm Generate™ High-Speed Edge Card Cable Assemblies. The demonstration emulates industry standard AI Acceleration hardware platforms. Visit www.samtec.com/pcie for more information.