Advanced Package Design

Complete Design & Support for Advanced Packaging Applications

Development

Complete support is available from the early stages of the design process, including:

  • Advanced IC Package Design
  • Material Selection & Procurement
  • Assembly Processing / Compatibility
  • Package Reliability / Testing
Prototyping

To help get your design to market faster, we offer quick-turn prototyping, along with:

  • Initial Concept Builds
  • Reasonable NREs
  • Industry-Leading Lead-Times
  • Minimized Iterations Save Time-to-Market
Production

Full production capabilities support a variety of order volumes and cost-levels:

  • High Yield Automation / Production
  • Repeatability / Process Control
  • Transfer Molding Capabilities
  • Asian Subcontractors Provide Flexibility

CORE PACKAGING CAPABILITIES

PRECISION DIE PLACEMENT

High-speed, high accuracy die placement (to +/- 3 microns)

WIRE BONDING

Ultra-fine pitch, ultra-low profile ball bond, wedge bond or ribbon bond

FINE PITCH FLIP CHIP & JET UNDERFILL

Ultra-high bump count; tight keep-out regions between die

ENCAPSULATION

Encapsulating with dam and fill, glob top or transfer molding

ADVANCED PACKAGING & ASSEMBLY

Advanced substrates, inspection & metrology

Glass substrate manufacturing, fan out technology

2.5D / 3D TxV technology

Wafer Dicing - 2" to 8" capabilities; thicknesses down to 25 μm

Solder Ball Attach for tight pitches down to 0.4 mm

Lid Attach - AuSn solder, glass frit, hermetic, fluidic, optical, custom materials

VIEW TYPICAL DESIGN GUIDELINES

COMPLEX WIRE BOND

FLIP CHIP & UNDERFILL

PRECISION DIE ATTACH

FINISHING CAPABILITIES

KEY ENABLING TECHNOLOGIES

Samtec is invested in the development of innovative products and technologies to meet the density and performance demands of next generation microelectronics. Some of our current technologies in development include:

  • Thermocompression Bonding
  • Gold Stud Bumping
  • Anodic Bonding (Wafer-to-Wafer)
  • Transfer Molding (Conventional and optically clear mold compounds)
  • Silicon Photonics and Optics with Ultra-Tight Tolerances
Contact the specialists at Samtec Microelectronics to discuss solutions for your IC Packaging application.
KEY ENABLING TECHNOLOGIES

IC PACKAGING & ASSEMBLY DESIGN GUIDELINES

NOTE

These dimensions are guidelines designed to help release product to manufacturing as quickly as possible. Full capabilities are not limited to the specifications included in this document. Please contact SME@samtec.com for applications with tighter requirements.

PRECISION DIE ATTACH

  • Minimum distance between surrounding square of fiducial and neighboring objects must be 0.048 mm
  • Gray level contrast between background and fiducial must be a minimum of 100 gray levels out of 256
  • Background of fiducial must not have a structure and background must be single colored gray level
  • Max. die size for dipping: 50 mm x 50 mm
  • No waffle-pack handling for die < 1 mm2
  • Maximum length to width ratio for components: 5:1
  • Saw kerfs must be at least 25 μm and into the dicing tape (through the entire wafer thickness)
  • Die attach materials can be non-conductive or conductive pastes, die attach films (DAF) and solder preforms; other processes can be discussed per customer requirements
PRECISION DIE ATTACH

LOW PROFILE & FINE PITCH WIRE BOND

Plating and layout requirements for substrate pad design as well as wire parameters:

  • Wedge Bond - ENIG plating is acceptable; typical wire types include Al, Au and Pt
  • Ball Bond - ENEPIG plating is recommended; typical wire types include Au & Cu

Processes that use Au ball bond, require Gold plate per MIL-G–45204, Type III, Grade A, Class 1:

  • 99.9% purity minimum
  • < 90 Knoop hardness
  • 50μ" thick, minimum
PRECISION DIE ATTACH
PRECISION DIE ATTACH

FLIP CHIP & UNDERFILL

Package Size (approximate):
  • Min: 10 mm x 10 mm
  • Max: 63 mm x 63 mm
Flux:
  • No-clean fluxes
  • Water-soluble fluxes
  • RMA-based fluxes
Substrate BGA Solder Ball:
  • Min Size: 0.18" dia (approx.)
  • Max Size: 0.025" dia (approx.)
  • Material: Eutectic Pb:Sn (37:63) or Pb-Free
Substrate BGA Pad:
  • Shortest BGA Ball Pitch: 0.80 mm x 0.80 mm
  • Furthest Pitch: No constraint
  • Pad Layout: Any configuration is acceptable
Substrate Stucture
Layer Thinkness

ENCAPSULATION

  • Maximum encapsulation thickness (board surface to top of encapsulation): 0.024" (600)
  • Automated dispense tool heated work area: 12" x 16"
  • Total work area: 20" x 30"
  • Machine positioning accuracy and repeatability: +/- 0.001"
Profile
Typical Package Design Rules
You can do a lot in three minutes.  From counting to 180 to making toast, the possibilities are endless.  However, our good friend Steve Leibson at Xilinx, encourages you to use your three minutes to take a look at our new video featuring Samtec’s FQSFP cable on Xilinx VCU118 FPG...
The battle for next-generation optical transceivers remains active. The three leading specifications duking it out include COBO, OSFP and QSFP-DD.  While all have their pros and cons, the industry continues to sort out the best solutions for the front panel and mid-board optical ...
Glass Weave Skew. For most people it probably sounds like a progressive rock band. But we’re talking about Glass Weave Skew and differential signals. Brandon Gore, Senior Staff Signal Integrity Engineer, and the Manager of Samtec’s Signal Integrity Group, R&D Hub recently present...
Who doesn’t like something new? Maybe it’s that new smell, a new flavor, or a new feature that draws you in each and every time. Well, we love new things around here and are excited to share the new Product Overview Guide. It might not smell or taste new, but it is packed with ne...
With our last web update, we brought you continued Phase 2 updates to our new our on-site search capabilities, as well as several updates to key content pages. In August, we continued the tweaks to our new on-site search, and also released a new experience for our Microelectronic...
View Full Site